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HAST-Highly Accelerated Stress Test Chambers

HAST Chamber
    HAST Chamber
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    A HAST chamber, for highly accelerated stress test, exposes semiconductor packages and electronic assemblies to steam above 100 °C under pressure, so that moisture penetrates molding compound, passivation and interfaces in tens of hours instead of the thousands of hours needed at 85 °C and 85 %RH. The failure mechanisms, metallization corrosion, delamination and ionic leakage, are the same as at lower temperature, only accelerated. The test is defined in JESD22-A110 (biased HAST), JESD22-A102 (unbiased autoclave) and IEC 60068-2-66.

    What the range covers

    • HAST Chamber LEHAST-350: 21 L, Φ300 x 450 mm, +105.0 to +142.9 °C unsaturated, 0.020 to 0.196 MPa
    • HAST Chamber LEHAST-450: 51 L, Φ400 x 450 mm, +105.0 to +162.2 °C unsaturated, 0.020 to 0.392 MPa

    Engineering features

    The pressure vessel is cylindrical, made of Cr-Ni-Mo stainless steel plate, and is loaded through a front door onto two stainless steel shelves. An inner cylinder and a door shield keep condensate that forms on the cooler vessel wall away from the specimens, since dew on a biased device produces a different failure from vapor phase moisture ingress.

    The water reservoir fills automatically at the start of each test. The controller holds saturated (100 %RH) or unsaturated (75 to 100 %RH) conditions by a wet bulb and dry bulb method, and regulates both temperature and humidity during heat-up and cool-down, so the specimen sees no uncontrolled condensation in the transitions. Twelve specimen power terminals pass bias through the vessel wall.

    A touch screen controller shows temperature, humidity and count-down time and has an Ethernet interface. Over-temperature and over-pressure protection, a pressure-tied door interlock and low water cutoff are typical for this class; the exact set is stated in the datasheet.

    Selecting a configuration

    Chamber size is driven by the number of test boards and their bias wiring rather than by the individual package. To quote, we need the following.

    • Test condition: JESD22-A110 at 130 °C and 85 %RH, JESD22-A102 at 121 °C saturated, or AEC-Q100
    • Number of test boards, their dimensions and the specimen count per board
    • Bias voltage, current per channel and number of channels through the vessel wall
    • Required upper temperature (142.9 or 162.2 °C sets the model)
    • Test duration in hours and runs per week
    • Utilities: electrical supply, deionized water source, drain

    Typical applications

    • Plastic encapsulated ICs per JESD22-A110 and JESD22-A118
    • Automotive semiconductor qualification per AEC-Q100
    • Printed circuit board and laminate evaluation (JPCA-ET08)
    • Conformal coating, adhesive and underfill screening
    • LED packages and optoelectronics

    Reference values above describe the product family. Guaranteed performance, included hardware, exclusions, interfaces and acceptance criteria are stated only in the project-specific technical proposal and approved datasheet.